我們將原本FAIL的訊號， Our signal is FAIL... 經由修改Layout的方式，如Via stub或其它技術將訊號品質變的更好， We can modify layout for example via stub or other skill to impove the signal integrity, 下圖為修正Layout後，所得到PASS的訊號品質。 after our skill, we got PASS signal integrity as below pic.

  我們將Layout進行仿真，可看出圖中電流密度頗高，這會使得PCB板過熱，導致於電壓降過大，使銅承受過大的電流，嚴重將可能燒板... We simulate layout which find the region that is high current density, it is be over-hot and it reduce voltage drop, it possible be burn over if it carried higher...